Docs.rs
autd3-core-14.2.2
autd3-core 14.2.2
Docs.rs crate page
MIT
Links
Repository
crates.io
Source
Owners
sssssssuzuki
Dependencies
autd3-driver ^14.2.2
normal
bitflags ^2.0.2
normal
nalgebra ^0.32.3
normal
rayon ^1.7.0
normal
serde ^1.0.166
normal
spdlog-rs ^0.3.8
normal
thiserror ^1.0.30
normal
assert_approx_eq ^1.1.0
dev
itertools ^0.11.0
dev
libc ^0.2.144
normal
windows ^0.48.0
normal
Versions
56.2%
of the crate is documented
Platform
i686-pc-windows-msvc
i686-unknown-linux-gnu
x86_64-apple-darwin
x86_64-pc-windows-msvc
x86_64-unknown-linux-gnu
Feature flags
Rust
About docs.rs
Privacy policy
Rust website
The Book
Standard Library API Reference
Rust by Example
The Cargo Guide
Clippy Documentation
☰
Crate autd3_core
Version 14.2.2
All Items
Re-exports
Modules
Structs
Enums
Constants
Traits
?
Crate
autd3_core
source
·
[
−
]
Re-exports
pub use
spdlog
;
pub use
f64
as float;
Modules
acoustics
amplitude
autd3_device
clear
cpu
datagram
defined
delay
error
firmware_version
fpga
gain
geometry
link
modulation
operation
silencer_config
stm
stop
sync_mode
synchronize
timer_strategy
update_flag
Structs
AdvancedDriveDuty
AdvancedDrivePhase
Body
CPUControlFlags
CPUVersionMajor
CPUVersionMinor
Clear
ConfigSilencer
Drive
ExclusiveNullBody
ExclusiveNullHeader
FPGAControlFlags
FPGAFunctions
FPGAInfo
FPGA information
FPGAVersionMajor
FPGAVersionMinor
FirmwareInfo
FocusSTM
FocusSTMBodyInitial
FocusSTMBodySubsequent
FocusSTMProps
ForceFan
GainAdvanced
GainAdvancedDuty
GainAdvancedPhase
GainLegacy
GainSTMAdvanced
GainSTMBodyInitial
GainSTMBodySubsequent
GainSTMLegacy
GainSTMProps
GlobalHeader
LegacyDrive
LegacyPhaseFull
LegacyPhaseHalf
ModDelay
ModInitial
ModSubsequent
Modulation
NullBody
NullHeader
ReadsFPGAInfo
RxDatagram
RxMessage
STMFocus
SilencerHeader
SyncAdvanced
SyncLegacy
TxDatagram
Enums
DriverError
Mode
Constants
EC_CYCLE_TIME_BASE_MICRO_SEC
EC_CYCLE_TIME_BASE_NANO_SEC
EC_INPUT_FRAME_SIZE
FOCUS_STM_BODY_INITIAL_SIZE
FOCUS_STM_BODY_SUBSEQUENT_SIZE
FOCUS_STM_BUF_SIZE_MAX
FOCUS_STM_FIXED_NUM_UNIT
FPGA_CLK_FREQ
FPGA main clock frequency
FPGA_SUB_CLK_FREQ
FPGA sub clock frequency
FPGA_SUB_CLK_FREQ_DIV
GAIN_STM_BUF_SIZE_MAX
GAIN_STM_LEGACY_BUF_SIZE_MAX
HEADER_SIZE
MAX_CYCLE
METER
MILLIMETER
MOD_BUF_SIZE_MAX
MOD_HEADER_INITIAL_DATA_SIZE
MOD_HEADER_SUBSEQUENT_DATA_SIZE
MSG_BEGIN
MSG_CLEAR
MSG_END
MSG_RD_CPU_VERSION
MSG_RD_CPU_VERSION_MINOR
MSG_RD_FPGA_FUNCTION
MSG_RD_FPGA_VERSION
MSG_RD_FPGA_VERSION_MINOR
MSG_SERVER_CLOSE
MSG_SIMULATOR_CLOSE
MSG_SIMULATOR_INIT
PI
Archimedes’ constant (π)
SAMPLING_FREQ_DIV_MIN
VERSION_NUM_MAJOR
VERSION_NUM_MINOR
Traits
GainOp
GainSTMOp
Operation
SyncOp